Transistor Lc Oscillators for Wireless Applications : Theory and Design Aspects

discussion and analysis of the start-up and steady-state oscillation conditions for transistor LC oscillators was given, with emphasis on CMOS devices. Part II2 presented both linear and nonlinear phase noise models for parallel feedback and negative resistance oscillators. Part III describes a new impulse response model for phase noise, which became popular recently. It specifies the contribution of the noise components located near integer multiples of the oscillation frequency in terms of waveform properties and circuit parameters.3,4 By using this nonlinear approach, it is impossible to derive an explicit relationship between the oscillator stability conditions, amplitude-to-phase conversion and phase noise power density, unlike using the Kurokawa approach. However, such an approach, based on the inherent time-varying nature of the oscillator, provides an important design insight by identifying and quantifying the major sources of phase noise degradation. The derivation of the expression for excess phase was based on postulating the unit impulse response as a function of the oscillator waveform. The relationship between excess phase and the circuit parameters, however, can be explicitly derived using a well-known phase plane approach.5